Open-source GPUs may be a thing soon. By design, the RISC-V architecture lets small businesses develop custom processors and microcontrollers without having to pay a fee. There are several paid and free IP (Intellectual Property) building blocks used to design RISC-V-based SoCs (System on Chip), but there is not currently a graphics option.
This will soon change, though. There is a group of enthusiasts that has begun developing an open-source GPU that is based on the RISC-V architecture.
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At this stage in the game, there does not appear to be any clear intent to compete against ARM, AMD, and nVidia. For now. Rather than that, this group is planning on developing a fused CPU/GPU ISA (Instruction Set Architecture) that is scalable. This is a system that the creators are envisioning will work well with simple microcontrollers just as well as it would with an advanced ray-tracing GPU.
GPUs that are designed with RV64X will use a basic RV32I or RV64I core that will support the new GPU instructions that are built on the base vector instruction set. At first, an RV32I core will be used but there will eventually be a RV64I in its place.
The goal here is to create a design that is size-efficient while also having custom extensibility and programmability that can be used for GPUs, CPUs, and VPUs, and more.
To make graphics processing possible, the stock RISC-V core will need to support new graphics and machine learning specific data types. It will need 8, 16, 24, and 32 bit fixed and floating point scalars, vectors (RV32-V), and matrices.
It’s also going to have vector and math instructions, as well as pixel and texture instructions, frame buffer instructions, configurable 136-bit vector registers, and a few more graphics-specific instructions. From the start, the graphics core is going to support the Vulkan API. The group is working, however, towards DirectX and OpenGL support.
The people behind RV64X say that its GPU will implement a standard graphics pipeline in its microcode. It will also support custom rasterizers like splines, SubDiv surfaces, patches, etc. RV64X will also include features that are not supported by currently available commercial GPUs.
The group is proposing the use of an RV32X implementation that has a hardware texture unit, a special function unit, a 32KB L1 cache, an 8K uCode SRAM cache, and four 32-bit DSPs/ALUs that can process FP32 and INT32 data. This comes as part of a report by HardwareLuxx. An FPGA is planned to be used to implement the design.
Its important to remember that the RV64X project is in its early stages. It’s going to take at least a few years before the specification is going to be finalized. It will take some time after that before we see any hardware emerge.
The RV64X group is also planning to develop a 64-bit universal ISA. The team is led by Atif Zafar, Grant Jennings, and Ted Marena.